A transmitting terminal of a recently using wireless communication device includes a Digital-Analog Converter (DAC) that converts a digital signal generated in a baseband modem to an analog signal. The DAC has an in-phase digital-analog conversion unit and a quadrature-phase digital-analog conversion unit in pairs. Each analog current signal converted in each conversion unit is converted to a voltage signal using a current-voltage converter within a Radio Frequency Integrated Circuit (RFIC) or an external resistor.
A digital signal generated in the baseband modem is constant in an In-Phase/Quadrature Phase (I/Q) gain. However, in a converted analog signal, an I/Q gain becomes different from a target value due to several factors such as a process deviation and a temperature change. In this case, because each of an In-Phase gain and a Quadrature Phase gain is different from a target value, a gain difference occurs between an In-Phase and a Quadrature Phase (I/Q mismatch).
A problem of the I/Q mismatch operates as a large factor that deteriorates an output Error Vector Magnitude (EVM) of a transmitter to worsen a communication quality, but conventionally, a signal was output with an open-loop method. In the conventional art, a design has been performed to reduce a process deviation that has an influence on an I/Q gain and this becomes a cause that increases a magnitude of consumption power or a size of a device.